Exemplary embodiments of the present invention relate to a discrete time receiver, and more particularly, to a discrete time receiver having a sampling frequency in a constant range so as to process a signal having an input frequency in a wide range and a wide bandwidth.
As the digitization of radio frequency (RF) transceivers is accelerated, existing structures of analog continuous time receivers have recently been developed as structures of digital discrete time receivers. Particularly, as finite impulse response (FIR)/infinite impulse response (IIR) filters and the like, which are frequently used in digital fields, are used in analog fields, there have been proposed various structures or receivers composed of switches and capacitors. The direction of the design of these structures has been developed in relation to the entire structure of receivers including these structures.
Since bandwidths and frequency ranges are varied depending on application, it is required to develop a structure capable of supporting various bands and modes.
Generally, the structure of a continuous time receiver using an analog circuit is widely used in current products. Products using the structure of a discrete time receiver have recently been developed with the trend of digitization by CMOS scaling-down.
However, application fields are limited to a narrow band, and the structure of the discrete time receiver is not applied to various products. The discrete time receiver should process various frequency signals so as to operate in a wide band applicable to various application. It can be applied to specific and various applications with controlling the sampling frequency.
FIG. 1 is a block configuration diagram illustrating a general discrete time receiver.
As illustrated in FIG. 1, the discrete time receiver has a structure of a discrete time filter that operates at a high frequency with a wideband using an RF sampling mixer.
A low noise trans-conductance amplifier (LNTA) 10 is positioned at an input stage. Here, the LNTA 10 performs functions of a low noise amplifier (LNA) and a trans-conductance amplifier (TA).
The LNTA 10 converts a voltage signal into a current signal while amplifying an input signal. The current signal is sampled and decimated in the discrete time filter including a sampling mixer 11, an IIR filter 12, an FIR filter 13 and an IIR filter 14 and then inputted to an analog-to-digital converter (ADC) via a variable amplifier 15.
In the structure described above, the FIR filter 13 performs an anti-aliasing function with various decimation ratios depending on a clock signal inputted thereto, and the IIR filters 12 and 14 remove interferers existing in the vicinity of a desired signal. In the IIR 14 at the rear stage of the FIR filter 13, a capacitor bank is connected to a switch so as to adjust a cutoff frequency. Then, the capacitance of the capacitor bank is changed depending on an operation of the switch, and therefore, the cutoff frequency is changed.
In a case where the dynamic range of the entire receiver is insufficient, the range of a signal detected by the ADC may be narrowed. Hence, the variable amplifier 15 is disposed at the front stage of the ADC so that the signal-to-noise ratio (SNR) of the entire receiver is not decreased.
The structure of the RF receiver has been developed to have a simple form such as soft defined radio (SDR). However, the performance of each block is not sufficient enough to complete the developed structure of the RF receiver, and therefore, it is difficult to perform commercialization.
Therefore, there has been proposed a structure of a discrete time receiver for overcoming such a problem.
The initial structure of the RF receiver was applied to applications including narrowband Bluetooth, wideband code division multiple access (WCDMA) with a narrow bandwidth, and the like. However, as interests has recently been increased in an application field such as long term evolution (LTE) or digital video broadcasting-handheld (DVB-H) with a broad bandwidth, it is required to develop a structure of a digital RF receiver designed so that the structure of the discrete time receiver can process not only a narrowband signal but also a broadband signal.
Also, it is required to develop a structure of a discrete time receiver capable of processing a multi-band and multi-mode signal. In the structure of the discrete time receiver, sampling is performed in an RF field, and the decimation ratio is adjusted according to a sampling frequency, so that an ADC can have a high resolution by decreasing the sampling frequency processed in the ADC as low as possible, and the performance of a discrete time filter used can be tuned according to an input frequency and a bandwidth.